Altera Avalon Verification IP Suite - Manual (Page 22)

set_irq()
set_irq()
set_irq() Prototype:
Verilog HDL:
int interrupt_bit
VHDL: int interrupt_bit , bfm_id , req_if(bfm_id)
Arguments:
void Returns:
Asserts the interrupt signal and sets the interrupt signal to 1,
regardless of the value you set for Assert IRQ high in the parameter
editor. Description:
Verilog HDL, VHDL Language Support:
Altera Corporation Avalon Interrupt Source and Interrupt Sink BFMs
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4-3 set_irq()