Altera Avalon Verification IP Suite - Manual (Page 40)

push_command()
void push_command()
Prototype:
Verilog HDL: None
VHDL: bfm_id , req_if(bfm_id)
Arguments:
void
Returns:
Inserts the fully populated transaction descriptor onto the pending transaction
command queue. Description:
Verilog HDL, VHDL Language support:
set_clken()
void set_clken(bit state)
Prototype:
Verilog HDL: bit state
VHDL:
bit state
,
bfm_id
,
req_if(bfm_id)
Arguments:
void Returns:
Sets the assertion and deassertion of the clock enable signal. Description:
Verilog HDL, VHDL Language support:
set_command_address()
void set_command_address(bit[AV_ADDRESS_W-1:0]addr)
Prototype:
Verilog HDL:
addr
VHDL:
addr
,
bfm_id
,
req_if(bfm_id)
Arguments:
void Returns:
Sets the transaction address in the command descriptor. Description:
Verilog HDL, VHDL Language support:
Avalon-MM Master BFM Altera Corporation
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push_command() 5-18