Document revision history, Document revision history -1 – Altera Avalon Verification IP Suite User Manual
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Changes
Version
Date
Made the following changes:
• Revised the VHDL API arguments. The following changes were made for
all VHDL procedures:
• Removed the
req_if
argument from
event_*
procedures.
• Changed the
req_if
argument to
req_if(bfm_id)
for all
set_*
,
get_
*
,
push_*
, and
pop_*
procedures.
• Changed the first argument to the
get_*
procedures to the return value.
• Added support for VHDL for the conduit and tri-state conduit interfaces.
• Updated Qsys tutorial to work in with Quartus II 14.0 software.
• Added Avalon-MM Testbenches for Verilog HDL and VHDL. This chapter
provides the following testbenches:
• Verilog HDL testbench for single Avalon-MM Master and Slave pair.
• Verilog HDL testbench for 2 Avalon-MM Masters that both connect to
2 Avalon-MM Slaves.
• VHDL testbench for single Avalon-MM Master and Slave pair.
• Verilog HDL testbench for 2 Avalon-MM Masters that both connect to
2 Avalon-MM Slaves.
• Reformatted.
3.3
June 2014
Added information on VHDL support for verification IP.
Removed information on the following wrappers. These wrappers are not
supported in the Quartus II software version 13.0 and higher.
• Avalon-MM master BFM with Avalon-ST API wrapper
• Avalon-MM slave BFM with Avalon-ST API wrapper
• Avalon-ST source BFM with Avalon-ST API wrapper
• Avalon-ST sink BFM with Avalon-ST API wrapper
Removed references to SOPC Builder.
3.2
May 2013
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