Altera Avalon Verification IP Suite User Manual

Page 25

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Table 5-1: Key to the Annotations

The following table lists the annotations used in the figure.

Description

Symbol

The initial command latency, which is two cycles for transactions 1 and 2. This time is set by
the API command

set_command_init_latency

.

T

init

The response wait time, which is three cycles. This time is determined by the number of cycles
that the

waitrequest

signal is asserted by the slave.The program gets this value using the

get_

response_wait_time

command.

T

wt_1

waitrequest

is always sampled #1 after the falling edge of

clk

.

T

wr

The idle time after each transaction. This time is set by the command

set_command_idle.

T

idle

The response latency for the first read, which is 3 cycles. This is the time between the read
command acceptance and the read response provided by the slave. The program gets this time
using the

get_response_latency

command.

If an Avalon-MM slave component defines the

readLatency

interface property, the

readdatavalid

signal is not used. The

readdatavalid

signal is not necessary because the slave

component has a fixed read latency.

For more information refer to the

Avalon Interface Specifications

.

T

rl_1

The response latency for the second read, which is 3 cycles. The program gets this time using
the

get_response_latency

command.

T

rl_2

The write response latency for the first write, which is 3 cycles. This is the time between when
the write command acceptance and the write response is provided by the slave. The program
gets this time using the

get_response_latency

command.

T

wrl_1

Signals when write or read commands are presented on the interface. The event name is

signal_

command_issued

.

S

ci_1

–S

ci_4

Signals write responses. The event name is

signal_response_complete.

S

rc_1

,S

rc_3

Signals read responses. The event name is

signal_response_complete.

S

rc_2

,S

rc_4

Signals the end of the test. The event name is

signal_all_transactions_complete

S

atc

Reference number to identify each read or write transaction.

T

ID_1

–T

ID_

4

Reference number to identify each write transaction.

ID_1, ID_3

Reference number to identify each read transaction.

ID_2, ID_4

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Avalon-MM Master BFM

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5-3

Timing

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