Altera Integer Arithmetic IP - Manual (Page 115)

Port Name Required Description
scanouta[]
No Output of scan chain A. Output port
[WIDTH_A - 1..0]
wide. When designing with Stratix III devices, port cannot be
selected when
scaninb[]
is in use. Do not use
scanina[]
and
scaninb[]
simultaneously.
scanoutb[]
No Output of scan chain B. Output port
[WIDTH_B - 1..0]
wide. When designing with Stratix III devices, port cannot be
selected when
scanina[]
is in use. Do not use
scanina[]
and
scaninb[]
simultaneously.
Table 9-6: ALTMULT_ADD Megafunction Output Ports (Stratix III and Stratix IV Devices Only)
Port Name Required Description
chainout_sat_overflow
No Overflow flag for the
chainout
saturation.
ALTMULT_ADD Parameters
The following table lists the parameters for the ALTMULT_ADD megafunction.
Note: For Stratix III, Stratix IV, and Arria II GX devices, when the output result is > 36 bits (for example,
when you set
width_a
=18 and
width_b
=18), the option for rounding and saturation is disabled.
This is because additional logic is used to generate the MSB.
Table 9-7: ALTMULT_ADD Megafunction Parameters
Parameter Name Type Requi
red
Description
NUMBER_OF_MULTIPLIERS
Integer Yes Number of multipliers to be
added together. Values are
1
up
to
4
.
WIDTH_A
Integer Yes Width of the
dataa[]
port.
WIDTH_B
Integer Yes Width of the
datab[]
port.
WIDTH_RESULT
Integer Yes Width of the
result[]
port.
Value includes all bits before
rounding and saturation.
INPUT_REGISTER_A0
String No Specifies the clock port for the
d
ataa[]
operand of the first
multiplier. Values are
UNREGIS-
TERED
,
CLOCK0
,
CLOCK1
,
CLOCK2
,
and
CLOCK3
. If omitted, the
default value is
CLOCK0
. For
Stratix III devices,
INPUT_
REGISTER_A0
must have similar
values with
INPUT_REGISTER_
A[1..3]
.
9-14 ALTMULT_ADD Parameters
UG-01063
2014.12.19
Altera Corporation ALTMULT_ADD (Multiply-Adder)
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