Altera Integer Arithmetic IP - Manual (Page 57)

The following shows the pre-adder coefficient mode of a multiplier.
Figure 6-3: Pre-adder Coefficient Mode
a0
b0
Mult0
result
coef
+/-
Preadder
coefsel0
Pre-adder Input Mode
In this mode, one multiplier operand derives from the pre-adder, and the other operand derives from the
datac[]
input port.
The following settings are applied in this mode:
• The width of the
dataa[]
input (
WIDTH_A
) must be less than or equals to 25 bits
• The width of the
datab[]
input (
WIDTH_B
) must be less than or equals to 25 bits
• The width of the
datac[]
input (
WIDTH_C
) must be less than or equals to 22 bits
• The number of multipliers must be set to 1
• All input registers must be registered with the same clock
This mode is expressed in the following equation.
The following shows the pre-adder input mode of a multiplier.
Figure 6-4: Pre-adder Input Mode
a0
b0
Mult0
result
c0
+/-
Pre-adder Square Mode
In this mode, both multiplier operands derive from the pre-adder.
6-4 Pre-adder Input Mode
UG-01063
2014.12.19
Altera Corporation ALTERA_MULT_ADD (Multiply-Adder)
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