Altera Integer Arithmetic IP - Manual (Page 73)

altmult_add_ex_msim (ModelSim-Altera files)
Understanding the Simulation Results
The following settings are observed in this example:
• The widths of the data inputs are all set to 16 bits
• The width of the output port,
result[]
, is set to 34 bits
• The input registers are all operating on the same clock
The following figure shows the expected simulation results in the ModelSim-Altera software.
Figure 6-13: ALTMULT_ADD Simulation Results
6-20 Understanding the Simulation Results
UG-01063
2014.12.19
Altera Corporation ALTERA_MULT_ADD (Multiply-Adder)
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