Altera POS-PHY Level 4 IP Core - Manual (Page 136)

G–6 Appendix G: Conversion from v2.2.x
Transmitter Signals
POS-PHY Level 4 IP Core User Guide December 2014 Altera Corporation
ctl_ax_fth ctl_a0_txfth
No change.
ctl_ax_errchk_chkpkt ctl_a0_errchk_chpkt
stat_td_fifo_emptyN stat_tc_txfifo_empty
err_aN_fifo_oflwN err_a0_txfifo_oflw
err_aN_meopN err_a0_meopN
err_aN_msopN err_a0_msopN
stat_aN_mp_erradrN stat_a0_mp_erradr
ctl_ts_status_mode —
Determines the pessimistic/optimistic
behavior.
stat_ty_extstat stat_a0_extstat
No change.
stat_ty_extstat_adr stat_a0_extstat_adr
stat_ty_extstat_val stat_a0_extstat_val
ctl_ts_statedge ctl_ts_statedge
ctl_ts_sync_good_threshold ctl_ts_dip2_good_threshold
Reduced to 4-bit only.
ctl_ts_sync_bad_threshold ctl_ts_dip2_bad_threshold
stat_ts_sync stat_ts_tstat_sync Slight behavior change.
ctl_ts_rsfrm —
New.
stat_ts_disabled —
stat_ts_dip2state stat_ts_dip2state
No change.
err_ts_frm err_ts_tstat_frm
err_ts_dip2 err_ts_dip2
ctl_ts_callen ctl_ts_txcallen
ctl_ts_calm ctl_ts_txcalm
stat_ts_calsel – New.
tav_clk –
New Avalon-MM interface signals. These
signals are present only when Asymmetric
Port Feature is turned on. tav_reset_n tied
high in the IP Toolbench top-level file.
tav_reset_n –
tav_address –
tav_chipselect –
tav_write –
tav_read –
tav_writedata –
tav_readdata –
tav_waitrequest –
ctl_td_holb_disable –
New. Replaces the ignore backpressure
wizard-selectable feature.
stat_td_holb – New.
ctl_td_maxt ctl_tc_txmaxt
No change. ctl_td_alpha ctl_tc_txalpha
ctl_td_burstlen ctl_tc_burstlen
Table G–2. Transmitter Signal Changes (Part 2 of 3)
Version 2.4.x and 2.3.x Signal
Name
Version 2.2.x Signal Name Notes