Altera POS-PHY Level 4 IP Core - Manual (Page 58)

4–20 Chapter 4: Functional Description—Receiver
Error Flagging and Handling
POS-PHY Level 4 IP Core User Guide December 2014 Altera Corporation
The Atlantic FIFO buffer error checker block checks for missing SOP and EOP
markers, for each port. If these markers are found to be missing, their respective
err_ry_msopN
and err_ry_meopN signals are asserted (high). These signals remain
high for one rxsys_clk cycle. These error conditions do not correlate directly—in
terms of latency—to the data going into, or coming out of, the FIFO buffer.
1 Altera recommends that you assert the ctl_ax_fifo_eopdav signal with the error
checker to ensure the buffer is emptied in the event of an overflow.
Atlantic buffer overflow
■ The Atlantic FIFO buffer error
checker block also handles
overflows
(err_ry_fifo_oflwN is
asserted).
■ If a packet is open when an
overflow occurs, the open
packet is closed and all
subsequent data associated
with that address is ignored
until an EOP associated with
that address is received.
■ Assert the err_ry_fifo_oflwN flag until the
FIFO buffer is flushed.
■ Any open packets are truncated with EOP and
ERR signal. If the last successful write
immediately before the overflow was an EOP, then
truncation is not necessary.
■ All further writes to the FIFO buffer are discarded
and ignored.
■ The FIFO buffer is drained (due to the assurance
that an EOP is in the FIFO buffer). Draining is
accomplished by the Atlantic sink logic (user
logic) as it continues to read data from the FIFO
buffer. Complete packets already written to the
FIFO buffer before the overflow occurred are not
corrupted and can be safely read.
■ Once the FIFO buffer is empty, the
err_ry_fifo_oflwN
is deasserted (low). Writes
to the FIFO buffer are ignored until a SOP is
received on that port.
Atlantic buffer underflow —
■ Assert stat_aN_fifo_emptyN for each Atlantic
FIFO buffer.
■ No loss of data if Atlantic compliant.
Table 4–4. Atlantic Error Handling (Part 2 of 2)
Error Condition Response