General plc timing considerations when using egd – FANUC Robotics America GFK-1541B User Manual

Page 157

Advertising
background image

5-8

TCP/IP Ethernet Communications for the Series 90™ PLC User's Manual

May 2002

GFK-1541B

5

General PLC Timing Considerations when using EGD

When designing applications using EGD, it is important to understand that the Ethernet Interface
and PLC CPU share internal memory for EGD operations. This shared memory interface is
represented by the diagram below.

CPU

ETHERNET

INTERFACE

SHARED

MEMORY

INTERNAL

MEMORY

NETWORK

Timing Considerations for the Series 90-30 CPU364 and Series 90-70 Ethernet
Interface

In a producing PLC, the CPU updates shared internal memory with a data sample after its own
period timer expires, affecting the length of the PLC sweep only for that particular exchange
update. Since an update occurs only once per period, this mode has little effect on the average
sweep time. When the Ethernet Interface’s period timer expires, it produces the data sample from
shared internal memory onto the network. Since the CPU’s period timer and the Ethernet
Interface’s period timer are asynchronous, a produced data sample could lag somewhat behind the
actual content of the CPU reference tables.

In a consuming PLC, shared internal memory is updated as soon as the Ethernet Interface gets a
data sample from the network. After the CPU period timer expires, the CPU updates its reference
tables from shared internal memory.

Timing Considerations for the Series 90-30 CPU374

In the Series 90-30 CPU374, there is no asynchronous timer running in the CPU for either
producer or consumer. In a producing PLC, the Ethernet Interface requests data from the CPU
when the Ethernet Interface’s timer expires. The CPU updates the requested data in the shared
memory on the next PLC sweep and that data is transferred on the network as soon as it is
available.

In a consuming PLC, the Ethernet Interface updates data in the shared memory as soon as it gets
a data sample from the network, then it notifies the CPU to transfer the data on its next sweep.
The data is transferred to the CPU reference tables on the next sweep.

www.cadfamily.com EMail:[email protected]
The document is for study only,if tort to your rights,please inform us,we will delete

Advertising