CONTREX CX-1200 User Manual
Page 179
5 - 86
Bits 100 through 107 are used to activate the Digital Outputs 0-7 respectively. The outputs are active low.
Therefore, when the “OUT” command moves a 1 into one of these bits, the corresponding output will
become active and pull the connected device to common, sinking current as dictated.
Bits 108 through 115 are used for temporary storage. They can be used to store the intermediate results of
relatively complicated rungs. They could be referred to as virtual “Control Relays” and they can be used in
the logic of several rungs
Bits 116 through 123 are used to set and reset the latches.
Bits 124 through 127 are used to enable the timers.
Bit 128 is used to reset Timer 4 since it retains its state when the Tmr4 En bit (PLC bit 127) is “0”.
Bits 130 through 133 are used to increment the corresponding counters. Bit 134 is used to decrement the
Counter 4 count. The count is incremented on the transition from a “0” to a 1 in the increment or decrement
bit.
Bits 135 through 137 are used to reset the corresponding counters. These are level activated; as long as the
reset bit remains active (1), the count will remain at “0”
Bit 138 is used to preset the Counter 4 count to the Cntr4 Preset value (CP-429). This is also a level
activated function - as long as the reset bit is active, the count will remain at the preset value for Counter 4
even if transitions occur on the increment (or decrement) bits.
Bits 140 through 142 are used to select the active block. This is accomplished in a binary (octal) fashion.
The following table represents the logic:
PLC Bit 142
PLC Bit 141
PLC Bit 140
BlkSel C
BlkSel B
BlkSel A
Active Block
0
0
0
0
0
0
1
1
0
1
0
2
0
1
1
3
1
0
0
4
1
0
1
5
1
1
0
6
1
1
1
7
Bit 148 is used to reset the integral term of the PID.
Bit 149 is used to control some control loop and ramp operations.
Bit 151 is used to may be used to disable Large Error Recovery.
Bits 152 through 154 are used to reset the position counters and the error. The error is the critical value that
drives the zero-error and the position control loops. The counters are preset with the FI1PsnPrst and
FI2PsnPrst values when the corresponding bits are active (level).
Bits 157 through 158 are used to control some control loop and ramp operations.
Bit 159 is used to negate the Scaled Reference signal. The Negate SR bit is used to reverse the direction of
the commanded speed, the Scaled Reference.
Bits 160 and 161 may be used to initiate a “Data Copy” operation where a value is transferred from one
parameter to another. See the definitions of CP’s 396 thru 399.