CONTREX CX-1200 - Manual (Page 192)

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PLC MONITOR P1/4
PLC Monitor 1
PLC Monitor 1 (CP-405) determines which PLC bit will be monitored in PLC Mon 1 Val (MP-108). The PLC Mon 1 Val
(MP-108) displays the name of the bit rather than “PLC Mon 1 Val”. To select a PLC bit to monitor, enter the number
of the bit or by use the ‘Scroll’ keys (^ or v) to scroll through the list. This bit can be monitored in any screen when
the code select line set to PLC Mon 1 Val (MP-108). For the bit list, refer to Appendices: Appendix L.
PLC Mon 1 Val
PLC Monitor 1 Value (MP-108) displays both the description and the value of the PLC bit that was selected in PLC
Monitor 1 (CP-405). Please note that a description of the PLC bit appears on the display line instead of the
parameter name (PLC Mon 1 Val).
PLC Monitor 2
PLC Monitor 2 (CP-406) functions identically to PLC Monitor 1 (CP-405). See above.
PLC Mon 2 Val
PLC Monitor 2 Value (MP-109) functions identically to PLC Monitor 1 Value (MP-108). See above.
DI Set
Digital Input Set (CP-403) simulates an “ACTIVE” condition on any or all of the PLC dedicated Digital Inputs (DI 15..8).
Digital Input Set (CP-403) is logically OR’ed with the actual DI 15..8 (MP-101) bits to form the PLC 15-8 (MP-110) bits.
The PLC 15-8 (MP-110) bits are used by the PLC logic. The value of DI Set (CP-403) will not effect the actual DI 15..8
(MP-101) value, rather, DI 15..8 (MP-101) reflects the present status of the actual inputs. Enter a “1” in a bit location
to simulate an active condition on the corresponding input. DI 15 to DI 8 get mapped into Bit 7 to Bit 0. Page two of
the “Help” screen displays inputs 15..8. Refer to Appendices: Appendic C.
PLC 15-8
PLC 15-8 (MP-110) displays the status of PLC bits 15-8. A “1” in any bit indicates that the input is “active”. The digital
inputs are active low. Page one of the “Help” screen displays the bit map for PLC 15-8. Also refer to Appendices:
Appendic C.
PLC Bit Set
PLC Bit Set (CP-407) forces a PLC bit to be set at “1”. Enter the number of the bit that you want to set at “1”. PLC Bit
Set (CP-407) tests your PLC program rather than commanding a direct operation. The bit is set prior to the PLC program
execution but after all the inputs, comparisons, timers and counters have had their status bits set up. However, the
PLC could clear this bit and unpredictable results can occur. Do not attempt to set a PLC bit that is controlled by an
OUT instruction in the PLC program. If you need to force an output, use DIG I/O TEST in the diagnostics screen. For
the bit list, refer to Appendices: Appendix L.
PLC Bit Clear
PLC Bit Clear (CP-408) forces a PLC bit to be reset to “0”. Enter the number of the bit that you want to clear. PLC Bit
Clear (CP-408) tests your PLC rather than to commanding a direct operation. The bit is cleared prior to the PLC program
execution but after all the inputs, comparisons, timers and counters have set up their status bits. However, the PLC
could set this bit and unpredictable results can occur. Do not attempt to clear set a PLC bit that is controlled by an OUT
instruction in the PLC program. If you need to force an output, use DIG I/O TEST in the diagnostics screen. For the
bit list, refer to Appendices: Appendix L.