Omron CQM1H-CLK21 User Manual

Page 187

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164

Checking Data Link Status

Section 5-4

quently cleared to 0000. Data processing methods that will not process
data or arithmetic operations when errors occur are recommended (such
as shown in the example for processing data only when data links are op-
erating normally or the example for processing data only when operation
is normal using the IL-ILC and JMP-JME instructions).

2.

The BSET(071) instruction is used to write 0000 to the corresponding area
in which the ladder program is executing, but the value in the data link table
will be read if the words are being monitored from Support Software. This
enables peripheral servicing (i.e., for Support Software) to be executed af-
ter the CPU Unit has performed I/O refreshing (Controller Link Unit data
link refresh).

3.

With Controller Link data links, if there is an error at the source node, the
previous data (i.e., data received immediately before the error) continues
to be stored in the data link receive area of the node receiving the data. To
clear the data in the receive area to 0 when an error occurs, include the
appropriate programming for clearing to 0, with reference to the above ex-
ample.

4.

Refresh processing for the data used in Controller Link data links is per-
formed between the Controller Link Unit and CPU Unit with every cycle and
so the above programming must be included at the start of the program.
This method (i.e., clearing to 0) can be used with C200HX/HG/HE, CS1,
and CS1-H CPU Units as long as the DLNK instruction is not used, and
can be used with CVM1/CV CPU Units as long as CPU execution process-
ing is set to synchronous processing. It cannot be used with C200HX/HG/
HE or CS1-H CPU Units if the DLNK instruction is used, or with CVM1/CV
CPU Units if CPU execution processing is set to asynchronous processing.
(This is because when the DLNK instruction is used with CS1-H CPU
Units, or when asynchronous processing is set for the CVM1/CV CPU
Units, the refreshing of data for data links is not synchronized with the in-
struction execution cycle.)

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