Simulating the design, Simulating the design –4 – Altera CPRI IP Core User Manual

Page 20

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2–4

Chapter 2: Getting Started

MegaWizard Plug-In Manager Design Flow

CPRI MegaCore Function

December 2013

Altera Corporation

User Guide

Simulating the Design

During the design process, to check your design quickly, you can simulate your CPRI
IP core with any of several Altera-supported EDA simulation tools.

f

For more information about these tools and how to simulate designs created using the
Quartus II software, refer to the “Simulation” section in

volume 3

of the Quartus II

Handbook.

Most CPRI IP core variations support a demonstration testbench. You can simulate
your CPRI IP core variation using its IP functional simulation model and
demonstration testbench. The IP functional simulation model, and testbench files for
the CPRI IP core variations that support demonstration testbenches, are generated in
your project directory when you generate your CPRI IP core. The testbench files
include scripts to compile and run the demonstration testbench. The testbench
demonstrates how to instantiate a model in a design and includes simple stimuli to
control the user interfaces of the CPRI IP core.

1

The autorate negotiation testbench is generated in VHDL, and the non-autorate
negotiation testbench is generated in System Verilog. If you specify Verilog HDL in
the MegaWizard Plug-In Manager, it generates a Verilog HDL IP functional
simulation model for the CPRI IP core. If you specify VHDL, the MegaWizard Plug-In
Manager generates a VHDL IP functional simulation model for the CPRI IP core.
Testbenches are generated as supported by the CPRI IP core variation you specify if
you turn on Generate Example Design. You can use the Verilog HDL functional
simulation model with the VHDL demonstration testbench for simulation, or vice
versa, using a mixed-language simulator.

For a complete list of models or libraries required to simulate the CPRI IP core, refer to
the compile.tcl scripts provided with the demonstration testbenches described in

Chapter 8, CPRI IP Core Demonstration Testbench

and in

Appendix C, CPRI Autorate

Negotiation Testbench

. If you turn on Generate Example Design for a variation

without a demonstration testbench, you can view the example scripts in the generated
testbench directory, and use them as a basis to assist you in building your own
testbench.

Not all variations provide demonstration testbenches. To run a demonstration
testbench, you must generate a variation that provides a working testbench. To ensure
your CPRI variation has a non-autorate negotiation testbench you can simulate, set
the following values in the CPRI parameter editor:

Operation mode

must have the value of Master.

If the CPRI variation has a MAP interface, Mapping mode must have the value of
All

or Basic.

If the CPRI variation has a MAP interface, Enable MAP interface synchronization
with core clock

must be turned off.

To ensure your CPRI variation has an autorate negotiation testbench, set the following
values in the CPRI parameter editor:

Operation mode

must have the value of Master.

Enable auto-rate negotiation

must be turned on.

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