Altera CPRI IP Core - Manual (Page 23)

Chapter 2: Getting Started 2–7
Instantiating Multiple CPRI IP Cores
December 2013 Altera Corporation CPRI MegaCore Function
User Guide
■ You must ensure that the gxb_cal_blk_clk input and gxb_powerdown signals are
connected according to the requirements for your target device family.
■ You must ensure that a single calibration clock source drives the
gxb_cal_blk_clk input to each CPRI IP core (or any other megafunction or
user logic that uses the ALTGX megafunction).
■ When you merge multiple CPRI IP cores in a single transceiver block, the same
signal must drive
gxb_powerdown to each of the CPRI IP core variations and
other megafunctions, Altera IP cores, and user logic that use the ALTGX
megafunction.
■ You must ensure that the instances each have different starting channel numbers.
Multiple CPRI IP cores in a single device must use distinct transceiver channels.
You enforce this restriction by specifying different starting channel numbers for
the distinct CPRI IP cores. Refer to
Chapter 3, Parameter Settings .
■ To configure multiple CPRI IP cores in a single transceiver block, you must specify
in your Quartus Settings File (.qsf) that these CPRI link data lines are configured
in the same
GXB_TX_PLL_RECONFIG_GROUP , using the following syntax for each
outgoing CPRI link cN_gxb_txdataout :
set_instance_assignment -name GXB_TX_PLL_RECONFIG_GROUP 1 -to cN_gxb_txdataout