Enable internally-clocked synchronization mode – Altera CPRI IP Core User Manual
Page 31
Chapter 3: Parameter Settings
3–7
Application Layer Parameters
December 2013
Altera Corporation
CPRI MegaCore Function
User Guide
If you set the
map_ac
field of the
CPRI_MAP_CNT_CONFIG
register to a number N that is
lower than the value you specify for Number of antenna/carrier interfaces, then the
first N data channels are active and the others are not. In addition, for each
antenna-carrier interface you can use the relevant
map_rx_enable bit
of the
CPRI_IQ_RX_BUF_CONTROL
register and the relevant
map_tx_enable
bit of the
CPRI_IQ_TX_BUF_CONTROL
register to enable or disable the specific data channel and
direction. A data channel must be configured, active, and enabled to function. If it is
configured and active but not enabled, or if it is configured but not active, data to and
from it is ignored.
The value you specify for Number of antenna/carrier interfaces is referred to as
N_MAP in this user guide.
For more information about the antenna-carrier interfaces in a CPRI IP core, refer to
.
Enable Internally-Clocked Synchronization Mode
If you configure one or more antenna-carrier interfaces, the option to Enable MAP
interface synchronization with core clock
is available. If you turn on this option, both
the MAP receiver interface and the MAP transmitter interface are clocked with the
CPRI IP core internal clock,
cpri_clkout
. If you turn off this option, these interfaces
are clocked with individual Rx and Tx clocks for each antenna-carrier interface. By
default, this option is turned off.
If you turn on this option, the CPRI IP core coordinates communication on these
interfaces in the internally-clocked synchronization mode. Turning on this option
simplifies synchronization of data transfers to and from the antenna-carrier interfaces.
The Boolean value you specify for Enable MAP interface synchronization with core
clock
is referred to as SYNC_MAP in this user guide.
shows the
correspondence between the parameter, the MAP interface synchronization mode,
and the clocks that clock the antenna-carrier interfaces.
For more information about these clocks, refer to
“Clocking Structure” on page 4–3
.
For more information about the synchronization modes for the Rx and Tx MAP
interfaces, and how they vary depending on your selection of this option, refer to
.
Vendor-Specific Space (VSS) Access through CPU Interface
When you turn on this option, you can access the VSS control words through the CPU
interface using the
CPRI_CTRL_INDEX
,
CPRI_TX_CTRL
, and
CPRI_RX_CTRL
registers.
Additionally, you can access other control words within a hyperframe. If this option is
turned off, you access all the control words directly through the AUX interface
instead.
Table 3–3. Meaning of Enable Map Interface synchronization with core clock Parameter
Enable MAP interface
synchronization with core clock
SYNC_MAP
MAP Interface
Synchronization Mode
Clocks for Antenna-Carrier Interfaces
On
1
Internally-clocked mode
cpri_clkout
Off
0
Synchronous buffer or
FIFO mode
mapN_rx_clk
,
mapN_tx_clk
, for
antenna-carrier interfaces
N
= 1 ... (N_MAP – 1)