Altera CPRI IP Core - Manual (Page 95)

Chapter 5: Testing Features 5–3
PRBS Generation and Validation
December 2013 Altera Corporation CPRI MegaCore Function
User Guide
1 The MAP interface module generates and checks the PRBS. If you configure no
antenna-carrier interfaces in your CPRI IP core, your IP core does not include a MAP
block and therefore does not support PRBS testing.
The value in the prbs_mode field of the CPRI_PRBS_CONFIG register ( Table 7–44 on
page 7–21 ) specifies whether the MAP interface module is in data mode or in PRBS
mode, and the generated pattern for loopback mode. The value applies to all AxC
interfaces. The following
prbs_mode values are available:
■ 00: Indicates that data samples, and not a PRBS test pattern, are expected on the
AxC interfaces. This value indicates the MAP interface module is not in PRBS
mode.
■ 01: Indicates an incremental counter sequence, starting at zero at the start of a
10 ms radio frame, and counting to 255 before rolling over. The counter value
appears in both halves of the 32-bit data word.
■ 10: Indicates an inverted 2 23 – 1 PRBS sequence. Each pattern appears in both
halves of the 32-bit data word.
The value 11 is reserved.
The CPRI_PRBS_STATUS register ( Table 7–45 on page 7–21 ) records the PRBS error
detection status for each AxC interface.
You can perform PRBS testing with a single REC master across a CPRI link in
loopback configuration, or across a CPRI link between two CPRI IP cores. To perform
PRBS testing across a CPRI link between two CPRI IP cores, you must program the RE
slave in reverse loopback mode and then program the REC master in PRBS mode.
To perform PRBS testing across a CPRI link, perform the following steps:
1. In the CPRI slave, program one of these registers to set up an internal reverse
loopback path:
■ Set the loop_mode field of the CPRI_PHY_LOOP register to the value of 1. This
loopback mode and the register are described in “Loopback Modes” on
page 5–1 and in Table 7–13 on page 7–7 .
■ Set the loop_mode field of the CPRI_CONFIG register to the value of 2’b001 or
2’b010. The value of 2’b001 specifies that all data and control words are looped
back. The value of 2’b010 specifies that all data is looped back, and that the
CPRI RE slave generates the outgoing control words locally. The PRBS pattern
is restricted to the data words in the incoming CPRI frame, so either of these
two loopback modes is adequate to send the full PRBS pattern back to the
generating CPRI REC master.
These loopback modes and the register are described in “Loopback Modes” on
page 5–1 and in Table 7–6 on page 7–4 .
2. In the CPRI master, program the prbs_mode field of the CPRI_PRBS_CONFIG register
for your preferred PRBS pattern according to the information in this section and in
Table 7–44 on page 7–21 .
The internal loopback mode you select determines the extent of the Rx and Tx path
testing in the RE slave IP core. For information about the two internal reverse
loopback modes and the differences between them, refer to
“Loopback Modes” on
page 5–1 .