Rainbow Electronics W90P710CDG User Manual
Page 101
W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 101 -
Revision B2
RXINTR [16]: Receive Interrupt
The RXINTR indicates the frame stored in the data buffer pointed by Rx descriptor caused an interrupt
condition.
1’b0: The frame doesn’t cause an interrupt.
1’b1: The frame caused an interrupt.
RBC [15:0]: Receive Byte Count
The RBC indicates the byte count of the frame stored in the data buffer pointed by Rx descriptor. The
four bytes CRC field is also included in the receive byte count. But if the SPCRC of register MCMDR
is enabled, the four bytes CRC field will be excluded from the receive byte count.
Rx Descriptor Word 1
31
30
29
28
27
26
25
24
RXBSA
23
22
21
20
19
18
17
16
RXBSA
15
14
13
12
11
10
9
8
RXBSA
7
6
5
4
3
2
1
0
RXBSA BO
RXBSA [31:2]: Receive Buffer Starting Address
The RXBSA indicates the starting address of the receive frame buffer. The RXBSA is used to be the
bit 31 to 2 of memory address. In other words, the starting address of the receive frame buffer always
located at word boundary.
BO [1:0]: Byte Offset
The BO indicates the byte offset from RXBSA where the received frame begins to store. If the BO is
2’b01, the starting address where the received frame begins to store is RXBSA+2’b01, and so on.