Rainbow Electronics W90P710CDG - Manual (Page 262)

W90P710CD/W90P710CDG
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BITS DESCRIPTIONS
[31:19] Reserved Reserved
[18] UNDREN2 FIFO2 UNDERRUN interrupt enable
[17] UNDREN1 FIFO1 UNDERRUN interrupt enable
[16] AHBEREN AHB ERROR interrupt enable
[15:6] Reserved Reserved
[5] HSEN HSYNC interrupt enable
[4] VSEN VSYNC interrupt enable
[3] VLFINEN2 FIFO2 VLINE FINISH interrupt enable
[2] VFFINEN2 FIFO2 VFRAME FINISH interrupt enable
[1] VLFINEN1 FIFO1 VLINE FINISH interrupt enable
[0] VFFINEN1 FIFO1 VFRAME FINISH interrupt enable
LCD Interrupt Status Register (LCDINTS)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
LCDINTS 0xFFF0_8008 R LCD interrupt status 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved UNDRIS2 UNDRIS1 AHBERIS
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Reserved HSIS VSIS VLFINIS2 VFFINIS2 VLFINIS1 VFFINIS1