Rainbow Electronics W90P710CDG User Manual

Page 440

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W90P710CD/W90P710CDG

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6.17 Smart Card Host Interface

The Smart Card resides in APB bus.
The whole chip of W90P710 operates at voltage level of 3.3 V except Smart Card Interface port's I/O
pins that are at 5 V to be compatible with mainstream Smart Card implementations. Advanced power
management feature further optimizes power consumption whether in operation or in power down
mode.

y

ISO-7816 compliant

y

PC/SC T=0, T=1 compliant

y

16-byte transmitter FIFO and 16-byte receiver FIFO

y

FIFO threshold interrupt to optimize system performance

y

Programmable transmission clock frequency

y

Versatile baud rate configuration

y

UART-like register file structure

y

Versatile 8-bit, 16-bit, 24-bit time-out counter for Answer-To-Reset (ATR) and waiting times

processing.

y

Parity error counter in reception mode and in transmission mode with automatic re-transmission.

y

Automatic activation and deactivation sequence through an independence sequencer

6.17.1 Register Mapping

R: read only, W: write only, R/W: both read and write, C: Only value 0 can be written.

Table 6.12.2.1 Smart Card Host Interface 0 Register Map

REGISTER

ADDRESS

R/W

DESCRIPTION

RESET VALUE

Smartcard Host Interface 0

SCHI_RBR0 0xFFF8_5000

(BDLAB=0) R Receiver Buffer Register

Undefined

SCHI_TBR0 0xFFF8_5000

(BDLAB=0) W Transmitter Buffer Register

Undefined

SCHI_IER0 0xFFF8_5004

(BDLAB=0) R/W Interrupt Enable Register

0x0000_0080

SCHI_ISR0 0xFFF8_5008

(BDLAB=0) R Interrupt Status Register

0X0000_00C1

SCHI_SCFR0 0xFFF8_5008

(BDLAB=0) W Smart

card FIFO Control Register

0x0000_0000

SCHI_SCCR0 0xFFF8_500C

R/W Smart

card Control Register

0x0000_0018

SCHI_CBR0 0xFFF8_5010

R/W Clock Base Register

0x0000_000C

SCHI_SCSR0 0xFFF8_5014

R Smart

Card Status Register

0x0000_0060

SCHI_GTR0 0xFFF8_5018

R/W Guard Rime Register

0x0000_0001

SCHI_ECR0 0xFFF8_501C

R/W Extended Control Register

0x0000_0052

SCHI_TMR0

0xFFF8_5020

R/W Test Mode Register

0x0000_0000

SCHI_TOC0 0xFFF8_5028

R/W Time

out

Configuration Register

0x0000_0000

SCHI_TOIR0_0 0xFFF8_502C

R/W Time out Initial Register 0

0x0000_0000

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