Rainbow Electronics W90P710CDG - Manual (Page 248)

W90P710CD/W90P710CDG
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BITS DESCRIPTIONS
[31:11] Reserved -
[10] DAT1_IS_
SD Interrupt Value Status
0 = SD interrupt at interrupt period. Write 1 to clear this status bit (set
DAT1_IS_ to 1).
1 = no SD interrupt at interrupt period.
If SD_IEN is set and DAT1_IS_ is 0, an interrupt request will be
generated.
Interrupt period is defined:
(1) If SD data bus width is 1 and DAT[1] is unused, the
interrupt period is any time on DAT[1]
(2) If SD data bus width is 4, the interrupt period is at the
single clock that is 2 clocks after the End bit of data block
[9] SD_DATA0
SD DAT0 Value
[8] DAT0_STS
SD Level Transition Status
0=No level transition
1=DAT0 value changes from high to low or low to high. Write 1 to clear
this status bit.
[7] CD_ Card Detection Indicator
[6] R2_CRC7
Response R2 CRC-7 Check Status
0=Fault
1=OK
[5] CRC
CRC Check Result Status
0=Fault
1=OK
[4] CRC-16
CRC-16 Check Result Status
0=Fault
1=OK
[3] CRC-7
CRC-7 Check Result Status
0=Fault
1=OK