Rainbow Electronics W90P710CDG User Manual
Page 480
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W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 481 -
Revision B2
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Rx
[7:0]
BITS
DESCRIPTIONS
[31:8]
Reserved
Reserved
[7:0]
Rx
Data Receive Register
The last byte received via I
2
C bus will put on this register. The I
2
C core
only used 8-bit receive buffer.
I2C Data Transmit Register 0/1 (I2C_TxR 0/1)
REGISTER ADDRESS
R/W
DESCRIPTION
RESET
VALUE
I2C_TXR0
0xFFF8_6014
R/W
I2C Data Transmit Register
0x0000_0000
I2C_TXR1
0xFFF8_6114
R/W
I2C Data Transmit Register
0x0000_0000
31
30
29
28
27
26
25
24
Tx
[31:24]
23
22
21
20
19
18
17
16
Tx
[23:16]
15
14
13
12
11
10
9
8
Tx
[15:8]
7
6
5
4
3
2
1
0
Tx
[7:0]
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