Rainbow Electronics W90P710CDG - Manual (Page 359)

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 359 - Revision B2
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
DLAB BCB SPE EPE PBE NSB WLS
HSUART Modem Control Register (HSUART_MCR)
REGISTER OFFSET R/W DESCRIPTION RESET VALUE
HSUART_MCR 0x10 R/W Modem Control Register (Optional) 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Reserved LBME Reserved RTS Reserved
BITS DESCRIPTIONS
[31:5] Reserved -
[4] LBME
Loop-back Mode Enable
0 = Disable
1 = When the loop-back mode is enabled, the following signals are connected
internally:
SOUT connected to SIN and SOUT pin fixed at logic 1
RTS# connected to CTS# and RTS# pin fixed at logic 1