Rainbow Electronics W90P710CDG User Manual
Page 179
W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 179 -
Revision B2
Continued.
BITS
DESCRIPTION
[5] FNOE
FrameNumberOverflowEnable
0: Ignore
1: Enable interrupt generation due to Frame Number Overflow.
[4] UREE
UnrecoverableErrorEnable
This event is not implemented. All writes to this bit are ignored.
[3] RDTE
ResumeDetectedEnable
0: Ignore
1: Enable interrupt generation due to Resume Detected.
[2] SOFE
StartOfFrameEnable
0: Ignore
1: Enable interrupt generation due to Start of Frame.
[1] WDHE
WritebackDoneHeadEnable
0: Ignore
1: Enable interrupt generation due to Write-back Done Head.
[0] SCHOE
SchedulingOverrunEnable
0: Ignore
1: Enable interrupt generation due to Scheduling Overrun.
Host Controller Interrupt Disable Register
Writing a ‘1’ to a bit in this register clears the corresponding bit, while writing a ‘0’ to a bit leaves the bit
unchanged.
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET
VALUE
HcInterruptEnable 0xFFF0_5014
R/W Host Controller Interrupt Disable Register
0x0000_0000
31
30
29
28
27
26
25
24
MIE
OCE
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
RHSCE
FNOE
UREE
RDTE SOFE WDHE SCHOE