Rainbow Electronics W90P710CDG User Manual
Page 530
W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 531 -
Revision B2
7.3.11 PS2 Interface AC Characteristics
PS2_CLK
PS2_DATA
T1
T2
T3
T4
Start Bit
Bit 0
Parity Bit
STOP Bit
1st
CLK
2nd
CLK
10th
CLK
11th
CLK
Timing for data received from the auxiliary device
T9
T8
T7
1st
CLK
2nd
CLK
9th
CLK
10th
CLK
11th
CLK
PS2_DATA
PS2_CLK
Parity Bit
Timing for data send to the auxiliary device
T5
Bit 0
SYMBOL DESCRIPTION MIN.
MAX.
UNIT
T1
Time from DATA transition to falling edge of CLK
5
25
us
T2
Time form rising edge of CLK to DATA transition
5
T4-5
us
T3
Duration of CLK inactive
30
50
us
T4
Duration of clock active
30
50
us
T5
Time to auxiliary device inhibit after clock 11 to ensure the
auxiliary device does not start another transmission
0 50
us
T7
Duration of CLK inactive
30
50
us
T8
Duration of CLK active
30
50
us
T9
Time to fom inactive to active CLK transition, used to time
when the auxiliary device samples DATA
30 50 us