Rainbow Electronics W90P710CDG - Manual (Page 273)

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 273 - Revision B2
BITS DESCRIPTIONS
[31:16] FIFO1COLCNT These bits indicate the FIFO1 request count per-line of video
[15:0] FIFO1ROWCNT These bits indicate the FIFO1 request count per-frame of video
FIFO2 Request Count Register (FIFO2DREQCNT)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
FIFO2DREQCNT 0xFFF0_803C R/W FIFO2 data request count 0x0000_0000
31 30 29 28 27 26 25 24
FIFO2COLCNT[31:24]
23 22 21 20 19 18 17 16
FIFO2COLCNT[23:16]
15 14 13 12 11 10 9 8
FIFO2ROWCNT[15:8]
7 6 5 4 3 2 1 0
FIFO2ROWCNT[7:0]
BITS DESCRIPTIONS
[31:16] FIFO2COLCNT These bits indicate the FIFO2 request count per-line of video
[15:0] FIFO2ROWCNT These bits indicate the FIFO2 request count per-frame of video
FIFO1 Current Access Address Register (FIFO1CURADR)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
FIFO1CURADR 0xFFF0_8040 R FIFO1 current access address 0x0000_0000