Rainbow Electronics W90P710CDG - Manual (Page 107)

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 107 - Revision B2
TXINTR [16]: Transmit Interrupt
The TXINTR indicates the packet transmission caused an interrupt condition.
1’b0: The packet transmission doesn’t cause an interrupt.
1’b1: The packet transmission caused an interrupt.
TBC [15:0]: Transmit Byte Count
The TBC indicates the byte count of the frame stored in the data buffer pointed by Tx descriptor for
transmission.
Tx Descriptor Word 3
31 30 29 28 27 26 25 24
NTXDSA
23 22 21 20 19 18 17 16
NTXDSA
15 14 13 12 11 10 9 8
NTXDSA
7 6 5 4 3 2 1 0
NTXDSA
NTXDSA [31:0]: Next Tx Descriptor Starting Address
The Tx descriptor is a link-list data structure. Consequently, NTXDSA is used to keep the starting
address of the next Tx descriptor. The bits [1:0] will be ignored by EMC. So, all Tx descriptor must
locate at word boundary memory address.