Rainbow Electronics W90P710CDG - Manual (Page 388)

W90P710CD/W90P710CDG
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BITS DESCRIPTIONS
[31:1] Reserved Reserved
[0] TEST
This register indicates whether AIC_IPER will be cleared or not after
been read. If bit0 of AIC_TEST has been set, ICE or debug monitor can
read AIC_IPER for verification and the AIC_IPER will not be cleared
automatically. Write access to the AIC_IPER will perform the interrupt
stacking in this mode.
TEST: ICE/Debug mode
0 = normal mode.
1 = ICE/Debug mode.