Rainbow Electronics W90P710CDG - Manual (Page 307)

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 307 - Revision B2
6.11 Audio Controller
The audio controller consists of IIS/AC-link protocol to interface with external audio CODEC.
One 8-level deep FIFO for read path and write path and each level has 32-bit width (16 bits for right
channel and 16 bits for left channel). One DMA controller handles the data movement between FIFO
and memory.
The following are the property of the DMA.
• Always 8-beat incrementing burst
• Always bus lock when 8-beat incrementing burst
• When reach middle and end address of destination address, a DMA_IRQ is requested to CPU
automatically
An AHB master port and an AHB slave port are offered in audio controller.
6.11.1 IIS Interface
The IIS interface signals are shown as figure 6.11.2.1
Figure 6.11.2.1 The interface signal of IIS
The 16 bits IIS and MSB-justified format are support, the timing diagram is shown as Figure 6.11.2.2
Audio
Controller
Audio
Codec
MCLK
BCLK
LRCLK
DOUT
DIN