Rainbow Electronics W90P710CDG User Manual
Page 104
W90P710CD/W90P710CDG
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CRCApp [1]: CRC Append
The CRCApp control the CRC append during frame transmission. If CRCApp is enabled, the 4-bytes
CRC checksum will be appended to frame at the end of frame transmission.
1’b0: 4-bytes CRC appending is disabled.
1’b1: 4-bytes CRC appending is enabled.
PadEN [0]: Padding Enable
The PadEN control the PAD bits appending while the length of transmission frame is less than 60
bytes. If PadEN is enabled, EMC does the padding automatically.
1’b0: PAD bits appending is disabled.
1’b1: PAD bits appending is enabled.
Tx Descriptor Word 1
31
30
29
28
27
26
25
24
TXBSA
23
22
21
20
19
18
17
16
TXBSA
15
14
13
12
11
10
9
8
TXBSA
7
6
5
4
3
2
1
0
TXBSA BO
TXBSA [31:2]: Transmit Buffer Starting Address
The TXBSA indicates the starting address of the transmit frame buffer. The TXBSA is used to be the
bit 31 to 2 of memory address. In other words, the starting address of the transmit frame buffer always
located at word boundary.
BO [1:0]: Byte Offset
The BO indicates the byte offset from TXBSA where the transmit frame begins to read. If the BO is
2’b01, the starting address where the transmit frame begins to read is TXBSA+2’b01, and so on.