Rainbow Electronics W90P710CDG User Manual
Page 246
W90P710CD/W90P710CDG
- 246 -
SD Host interface Initial Register (SDHIIR)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
SDHIIR
0xFFF0_7304
R/W
SD Host Interface Initial Register
0x0000_0018
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved SPD
7
6
5
4
3
2
1
0
SD_CLK
BITS
DESCRIPTIONS
[31:9]
Reserved -
[8]
SPD
Data Bus Width Control
0=1-bit data bus
1=4-bit data bus
[7:0]
SD_CLK
SD Clock Control
The frequency of SD clock will be equal to (Input Clock/(SD_CLK+1)).
The SD_CLK = 8’h00 is reserved.
SD Interface Interrupt Enable Register (SDIIER)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
SDIIER
0xFFF0_7308
R/W
SD Interface Interrupt Enable Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
SD_IEN DAT0_IEN
CD_IEN DO_IEN DI_IEN