Rainbow Electronics W90P710CDG - Manual (Page 481)

W90P710CD/W90P710CDG
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BITS DESCRIPTIONS
[31:0] Tx
Data Transmit Register
The I 2 C core used 32-bit transmit buffer and provide multi-byte
transmit function. Set CSR[Tx_NUM] to a value that you want to
transmit. I
2 C core will always issue a transfer from the highest byte
first. For example, if CSR[Tx_NUM] = 0x3, Tx[31:24] will be
transmitted first, then Tx[23:16], and so on.
In case of a data transfer, all bits will be treated as data.
In case of a slave address transfer, the first 7 bits will be treated as 7-
bit address and the LSB represent the R/W bit. In this case,
LSB = 1, reading from slave
LSB = 0, writing to slave