Rainbow Electronics W90P710CDG - Manual (Page 47)

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 47 - Revision B2
6.2.5.2 Rotate Priority Mode
In Rotate Priority Mode (PRTMOD=1), the IPEN and IPACT bits have no function (i.e. can be ignored).
W90P710 uses a round robin arbitration scheme ensures that all bus masters have equal chance to gain
the bus and that a retracted master does not lock up the bus.
6.2.6 Power management
W90P710 provide three power management scenarios to reduce power consumption. The
peripherals’ clocks can be enabled / disabled individually by controlling the co-responding bit in
CLKSEL control register. Software can turn-off the unused modules’ clocks to saving the unnecessary
power consumption. It also provides idle and power-down modes to reduce power consumption.
Crystal
Oscillator
480MHz
PLL
16-bit
Counter
CLKS
HCLK
IDLE
MIDLE
PD
. .
. .
.
HCLK_cache
HCLK_memc
HCLK_EMC
EXTAL
XTAL
EnEMCclk
EnLCDclk
. .
. .
.
. .
. .
.
HCLK_LCD
W90P710 Clock Generator
Fig. 6.2.6 W90P710 system clock generation diagram
IDLE MODE
If the IDLE bit in Power Management Control Register (PMCON) is set, the ARM CORE clock source
will be halted, the ARM CORE will not go forward. The AHB or APB clocks still active except the clock
to cache controller and ARM are stopped. W90P710 will exit idle state when nIRQ or nFIQ from any
peripheral is revived; like keypad, timer overflow interrupts and so on. The memory controller can also
be forced to enter idle state if both MIDLE and IDLE bits are set. Software must switch SDRAM into
self-refresh mode before forcing memory to enter idle mode.