Rainbow Electronics W90P710CDG User Manual

Page 147

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W90P710CD/W90P710CDG

Publication Release Date: September 19, 2006

- 147 -

Revision B2

Missed Packet Count Register (MPCNT)

The MPCNT keeps the number of packets that were dropped due to various types of receive errors.
The MPCNT is a read clear register. In addition, S/W also can write an initial value to MPCNT and the
missed packet counter will start counting from that initial value. If the missed packet counter is
overflow, the MMP of MISTA will be set.

REGISTER

ADDRESS

R/W

DESCRIPTION

RESET VALUE

MPCNT 0xFFF0_30B8

R/W

Missed Packet Count Register

0x0000_7FFF

31

30

29

28

27

26

25

24

Reserved

23

22

21

20

19

18

17

16

Reserved

15

14

13

12

11

10

9

8

MPC

7

6

5

4

3

2

1

0

MPC

BITS

DESCRIPTIONS

[31:16] Reserved -

[15:0] MPC

The Miss Packet Count indicates the number of packets that were
dropped due to various types of receive errors. The following type of
receiving error makes missed packet counter increase:

ƒ

Incoming packet is incurred RxFIFO overflow.

ƒ

Incoming packet is dropped due to RXON is disabled.

ƒ

Incoming packet is incurred CRC error.

MAC Receive Pause Count Register (MRPC)

The EMC of W90P710 supports the PAUSE control frame reception and recognition. If EMC received
a PAUSE control frame, the operand field of the PAUSE control frame will be extracted and stored in
the MRPC register. The MRPC register will keep the same while Tx of EMC is pausing due to the
PAUSE control frame is received. The MRPC is read only and write to this register has no effect.

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