ARM Cortex R4F - Manual (Page 169)

Events and Performance Monitor
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 6-5
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[43] TCM correctable ECC error reported by load/store unit. Yes 0x6A
[44] TCM correctable ECC error reported by prefetch unit. Yes 0x6B
[45] TCM parity or fatal ECC error reported by AXI slave interface. - 0x6C
[46] TCM correctable ECC error reported by AXI slave interface. Yes 0x6D
N/A Cycle count -
0xFF
a. This event is only generated for by revisions r1p2 and later of the processor.
Table 6-1 Event bus interface bit functions (continued)
EVNTBUS
bit position
Description
CFLR
update
Event
Ref.
Value