ARM Cortex R4F - Manual (Page 418)

Processor Signal Descriptions
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. A-5
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CFGBTCMSZ[3:0] Input Tie-off Selects the BTCM size. The encodings for the TCM sizes are:
b0000 = 0KB
b0011 = 4KB
b0100 = 8KB
b0101 = 16KB
b0110 = 32KB
b0111 = 64KB
b1000 = 128KB
b1001 = 256KB
b1010 = 512KB
b1011 = 1MB
b1100 = 2MB
b1101 = 4MB
b1110 = 8MB.
CFGNMFI Input Tie-off,
Reset When HIGH, enable non-maskable Fast Interrupts. Reflected in
the NMFI bit. See c1, System Control Register on page 4-35 for
more information.
ENTCM1IF Input Tie-off Enable B1TCM interface.
Use B0TCM only if this signal not tied HIGH.
PARECCENRAM[2:0] Input Tie-off,
Reset TCMs parity or ECC check enable. Tie each bit HIGH to enable
parity or ECC checking on the appropriate TCM at reset. Use
following values:
2:B1TCM
a
1: B0TCM a
0: ATCM
See Auxiliary Control Registers on page 4-38 for more
information.
PARLVRAM Input Tie-off,
Reset Selects between odd and even parity for caches, TCMs, and
buses. See Chapter 8 Level One Memory System:
Tie LOW for even parity
Tie HIGH for odd parity.
Table A-2 Configuration signals (continued)
Signal Direction Clocking Description