Figure 2-3, Register organization -9 – ARM Cortex R4F User Manual
Page 55
Programmer’s Model
ARM DDI 0363E
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Figure 2-3 Register organization
Note
For 16-bit Thumb instructions, the high registers, R8–R15, are not part of the standard register
set. You can use special variants of the
MOV
instruction to transfer a value from a low register, in
the range R0–R7, to a high register, and from a high register to a low register. The
CMP
instruction
enables you to compare high register values with low register values. The
ADD
instruction
enables you to add high register values to low register values. For more information, see the
ARM Architecture Reference Manual.
General registers and program counter
System and User
Program status registers
= banked register
Supervisor
Abort
IRQ
Undefined
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
FIQ
R0
R1
R2
R3
R4
R5
R6
R7
R8_fiq
R9_fiq
R10_fiq
R11_fiq
R12_fiq
R13_fiq
R14_fiq
R15 (PC)
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_svc
R14_svc
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_abt
R14_abt
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_irq
R14_irq
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_und
R14_und
CPSR
CPSR
CPSR
CPSR
CPSR
CPSR
SPSR_fiq
SPSR_svc
SPSR_abt
SPSR_irq
SPSR_und
R15 (PC)
R15 (PC)
R15 (PC)
R15 (PC)