ARM Cortex R4F - Manual (Page 248)

Level Two Interface
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 9-15
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9.3.6 Non-cacheable or write-through writes
Store instructions to Non-cacheable or write-through Normal memory generate AXI bursts that
are not necessarily the same size or length as the instruction implies. The AXI master port
asserts byte-lane-strobes, WSTRBM[7:0], to ensure that only the bytes that were written by the
instruction are updated.
The tables in this section give examples of the types of AXI transaction that might result from
various store instructions, accessing various addresses in Non-cacheable Normal memory. They
are provided as examples only, and are not an exhaustive description of the AXI transactions.
Depending on the state of the processor, and the timing of the accesses, the actual bursts
generated might have a different size and length to the examples shown, even for the same
instruction.
In addition, write operations to Normal memory can be merged to create more complex AXI
transactions. See Normal write merging on page 9-17 for examples.
Table 9-17 shows possible values of AWADDRM, AWBURSTM, AWSIZEM, and
AWLENM for an
STRH
to Normal memory.
0x18 (word 6) 0x18 Incr 64-bit 1 data transfer
0x00
Incr 64-bit 2 data transfers
0x1C (word 7) 0x1C Incr 32-bit 1 data transfer
0x00 Incr 64-bit 2 data transfers
Table 9-16 LDM5, Non-cacheable Normal memory or cache disabled (continued)
Address[4:0] ARADDRM ARBURSTM ARSIZEM ARLENM
Table 9-17 STRH to Cacheable write-through or Non-cacheable Normal memory
Address[2:0] AWADDRM AWBURSTM AWSIZEM AWLENM WSTRBM
0x0
(byte 0)
0x00
Incr 32-bit 1 data transfer b00000011
0x1 (byte 1) 0x00 Incr 32-bit 1 data transfer b00000110
0x2 (byte 2) 0x02 Incr 64-bit 1 data transfer b00001100
0x3
(byte 3)
0x03
Incr 32-bit 2 data transfers b00001000
b00010000
0x4 (byte 4) 0x04 Incr 16-bit 1 data transfer b00110000
0x5 (byte 5) 0x05 Incr 32-bit 1 data transfer b01100000
0x6
(byte 6)
0x06
Incr 16-bit 1 data transfer b11000000
0x7 (byte 7) 0x07 Incr 8-bit 1 data transfer b10000000
0x08 Incr 8-bit 1 data transfer b00000001