17 authentication status register, Table 11-21, Os lock status register functions -29 – ARM Cortex R4F User Manual

Page 298: Table 11-22, Authentication status register bit functions -29, Figure 11-12, Os lock status register format -29, Figure 11-13, Authentication status register format -29

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Debug

ARM DDI 0363E

Copyright © 2009 ARM Limited. All rights reserved.

11-29

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Figure 11-12 OS Lock Status Register format

Table 11-21 shows how the bit values correspond with the OS Lock Status Register functions.

11.4.17 Authentication Status Register

The Authentication Status Register is a read-only register that reads the current values of the
configuration inputs that determine the debug permission level.

Figure 11-13 shows the bit arrangement of the Authentication Status Register.

Figure 11-13 Authentication Status Register format

Table 11-22 shows how the bit values correspond with the Authentication Status Register
functions.

31

0

Reserved

1

Lock implemented bit

Table 11-21 OS Lock Status Register functions

Bits

Field

Function

[31:1]

Reserved

RAZ.

[0]

Lock implemented bit

Indicates that the OS lock functionality is not implemented. This bit always reads 0.

31

0

3

Reserved

4

5

6

7

8

Secure non-invasive debug features implemented

Secure non-invasive debug features enabled

Secure invasive debug features implemented

Secure invasive debug features enabled

Non-secure debug features

Table 11-22 Authentication Status Register bit functions

Bits

Field

Value

Function

[31:8]

Reserved

-

RAZ

[7]

Secure non-invasive debug
features implemented

0b1

Implemented

[6]

Secure non-invasive debug
features enabled

DBGEN || NIDEN

Non-invasive debug enable field

[5]

Secure invasive debug
features implemented

0b1

Implemented

[4]

Secure invasive debug
features enabled

DBGEN

Invasive debug enable field

[3:0]

Non-secure debug features

a

0x0

Not implemented

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