ARM Cortex R4F - Manual (Page 194)

Memory Protection Unit
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 7-11
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7.4 MPU interaction with memory system
This section describes how to enable and disable the MPU. After you enable or disable the
MPU, the pipeline must be flushed using
ISB and DSB instructions to ensure that all subsequent
instruction fetches see the effect of turning on or off the MPU.
Before you enable or disable the MPU you must:
1. Program all relevant CP15 registers. This includes setting up at least one memory region
that covers the currently executing code, and that the attributes and permissions of that
region are the same as the attributes and permissions of the region in the default memory
map that covers the code, and that the region is executable in Privileged mode.
2. Clean and invalidate the data caches.
3. Disable caches.
4. Invalidate the instruction cache.
The following code is an example of enabling the MPU:
MRC p15, 0, R1, c1, c0, 0 ; read CP15 register 1
ORR R1, R1, #0x1
DSB
MCR p15, 0, R1, c1, c0, 0
; enable MPU
ISB
Fetch from programmed memory map
Fetch from programmed memory map
Fetch from programmed memory map
Fetch from programmed memory map
The following code is an example of disabling the MPU:
MRC p15, 0, R1, c1, c0, 0 ; read CP15 register 1
BIC R1, R1, #0x1
DSB
MCR p15, 0, R1, c1, c0, 0
; disable MPU
ISB
Fetch from default memory map
Fetch from default memory map
Fetch from default memory map
Fetch from default memory map
Table 7-1 on page 7-2 shows the default memory map.