ARM Cortex R4F - Manual (Page 438)

ECC Schemes
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B.1 ECC scheme selection guidelines
When deciding to implement a Cortex-R4 processor with an ECC scheme on one or both of the
TCM interfaces, give careful consideration between using 32-bit or 64-bit ECC. To calculate or
check the ECC code for data, the processor must know the value of all bytes in the data chunk
protected by the scheme. Therefore, when using these schemes, the processor must perform
additional read accesses to calculate and check the ECC code stored with the data.
For example, if the ATCM is implemented with 32-bit ECC and a program performs an aligned
STR to the memory, the processor can calculate the error correction code using only the data
stored by the program.
If the same memory was implemented with 64-bit ECC, the processor cannot calculate the ECC
code for the doubleword memory chunk being written using only the data stored by the program.
To calculate the ECC code and store the data, the processor must first perform a read of the other
word in that memory chunk. This increases the number of memory accesses required to execute
the program. This increases power consumption, and can also lead to a decrease in performance.
Use the following guidelines to decide which scheme to use. If you are in any doubt, benchmark
your system running typical software to find the best balance between area, power, and
performance for your application.
• For a TCM interface that contains mainly instructions, use 64-bit ECC. The vast majority
of reads requested by the prefetch unit are doubleword.
• Use 64-bit ECC when a TCM contains data that is accessed using:
—
LDRD
or
STRD
instructions where the start address is doubleword aligned
—
LDM
or
STM
instructions where the start address is doubleword aligned and there are
an even number of registers in the register list.
64-bit ECC requires less RAM area, and does not provide any performance loss or
increased power consumption over 32-bit ECC in these cases.
• When LDM and STM instructions are used to access many registers, the majority of TCM
accesses do not require additional reads with 64-bit ECC.
• 32-bit ECC provides better power consumption and generally better performance
compared to 64-bit ECC when:
—
a program performs many unaligned accesses to data in a TCM
— a program performs many byte, halfword, and word accesses to data in a TCM.
You might be able to obtain optimal results by using a different error detection scheme on each
TCM interface, and allocating instructions and data to each interface based on the guidelines
given above.