Altera Cyclone II DSP Development Board User Manual

Page 4

Advertising
background image

iv

Reference Manual

Altera Corporation

Cyclone II DSP Development Board

August 2006

Contents

General Connectors ............................................................................................................................. 2–50

JTAG Connector (J9) ...................................................................................................................... 2–50
Active Serial Interface (ASI) Connector (J13) ............................................................................. 2–52
Mictor Connector (J12) ................................................................................................................... 2–53

Status LEDs & Reset/Power Switches .............................................................................................. 2–57

Power (D1) & Status (D10) LEDs ................................................................................................. 2–57
Power Switch (SW1) ....................................................................................................................... 2–57
User Defined Reset (SW6) Push-Button ...................................................................................... 2–57
System Reset (SW7) Push-Button ................................................................................................. 2–58

Clock Circuitry ..................................................................................................................................... 2–59

Setting the Clocks ........................................................................................................................... 2–60
CLK SMA Connector (J17) ............................................................................................................ 2–61
On-Board/Custom Clock Oscillators Select Jumper (J18) ........................................................ 2–61
Clock Select Jumper (J19) .............................................................................................................. 2–62
Socket for a Custom Clock Oscillator (J20) ................................................................................. 2–62
D/A Converter CLK SMA Connector (J26) ................................................................................ 2–62
A/D Converter CLK SMA Connector (J27) ................................................................................ 2–62
D/A Converter CLK Select Jumper (J35 & J34) ......................................................................... 2–62
A/D Converter CLK Select Jumper (J37 & J36) ......................................................................... 2–62
D/A Converter Power Select Jumper (J33) ................................................................................ 2–63
Clock Buffer (U16) .......................................................................................................................... 2–64
On-Board Clock Oscillator (U20) ................................................................................................. 2–64

Power Supply ....................................................................................................................................... 2–65

DC Power Input Jack (J1) .............................................................................................................. 2–65
Voltage Limiter Switches (U13-U15, U18 & U19) ...................................................................... 2–66
On-Board Power Regulators (U2, U7, U8, U9, U10, U23 & U24) ............................................ 2–66
Bench Power Supplies Using Banana Jacks ................................................................................ 2–67
Power Plane Connectors (J2-J6, J39 Through J42) ...................................................................... 2–69

Appendix A. DDR2 SDRAM DIMM Connector Pin Out Table

Introduction ........................................................................................................................................... A–1

Appendix B. SSRAM Pin-Out Table

Introduction ........................................................................................................................................... B–1

Appendix C. Cyclone II EP2C70 Device Pin-Out Table

Introduction ........................................................................................................................................... C–1

Appendix D. Restoring the Factory Design

Introduction ........................................................................................................................................... D–1

Factory-Programmed Factory Design .......................................................................................... D–1
User Designs .................................................................................................................................... D–1
Reprogramming the Factory Design to the EPSC64 Device (U17) .......................................... D–1

Advertising