Altera Cyclone II DSP Development Board User Manual
Page 97
Altera Corporation
Reference Manual
C–11
August 2006
Cyclone II DSP Development Board
DIMM_DQ69
B4
G14
DIMM_DQ51
DIMM_DQ7
AD16
G15
DIMM_DQ59
DIMM_DQ70
A5
G16
DIMM_DQ58
DIMM_DQ71
C7
G17
GND
DIMM_DQ8
Y15
G18
ADC_B_D9
DIMM_DQ9
AA15
G19
VCCA_PLL2
DIMM_DQS0
AF19
G2
PROTO_IO27
DIMM_DQS1
AE15
G20
GND
DIMM_DQS2
AE13
G21
EVM_DX0
DIMM_DQS3
AE8
G22
EVM_FSX0
DIMM_DQS4
B8
G23
EVM_D28
DIMM_DQS5
C12
G24
EVM_D30
DIMM_DQS6
B14
G25
EVM_CLKR0
DIMM_DQS7
C17
G26
EVM_A17
DIMM_DQS8
B6
G3
PROTO_IO11
DIMM_ODT_R0
AF21
G4
PROTO_IO10
DIMM_ODT_R1
AE23
G5
PROTO_IO8
DIMM_RASN_R
AE20
G6
PROTO_IO2
DIMM_RESETN
AD23
G7
GND
DIMM_SCL
AA18
G8
VCCA_PLL3
DIMM_SDA
AF20
G9
DIMM_DQ64
DIMM_SYNC_CLK
AB21
H1
PROTO_IO18
DIMM_SYNC_CLK
AF14
H10
1.2V
DIMM_WEN_R
AA17
H11
1.2V
EP2C_ASDO
E3
H12
GND
EP2C_CEN
N4
H13
GND
EP2C_CONFIG_DONE
R23
H14
GND
EP2C_CONFIGN
N7
H15
1.2V
EP2C_CSON
D3
H16
1.2V
EP2C_DATA0
N3
H17
1.2V
EP2C_DCLK
N6
H18
1.8V
EP2C_MSEL1
P21
H19
1.2V
Table C–1. Cyclone II EP2C70F672-C6ES FPGA Pin-Outs (Part 11 of 22)
Note (1)
Alphabetical by Signal Name
Alphabetical by Pin Number
Schematic Signal Name
Pin Number
Pin Number
Schematic Signal Name