Appendix c. cyclone ii ep2c70 device pin-out table, Introduction – Altera Cyclone II DSP Development Board User Manual
Page 87
Altera Corporation
Reference Manual
C–1
August 2006
Preliminary
Appendix C. Cyclone II EP2C70
Device Pin-Out Table
Introduction
lists the Cyclone™ II EP2C70F672 FPGA pin-outs
alphabetically by signal name and alphabetically by pin number.
Table C–1. Cyclone II EP2C70F672-C6ES FPGA Pin-Outs (Part 1 of 22)
Alphabetical by Signal Name
Alphabetical by Pin Number
Schematic Signal Name
Pin Number
Pin Number
Schematic Signal Name
1.2V
H10
A10
DIMM_DQ41
1.2V
H11
A11
1.8V
1.2V
H15
A12
GND
1.2V
H16
A13
ADC_A_DCLK
1.2V
H17
A14
USER_RESETN
1.2V
H19
A15
GND
1.2V
H20
A16
1.8V
1.2V
H7
A17
DIMM_DQ61
1.2V
J18
A18
DIMM_DQ56
1.2V
J9
A19
USER_DIPSW1
1.2V
K10
A2
GND
1.2V
K11
A20
ADC_B_D6
1.2V
K12
A21
ADC_A_D9
1.2V
K13
A22
ADC_A_D13
1.2V
K14
A23
ADC_A_D10
1.2V
K15
A24
1.8V
1.2V
K18
A25
GND
1.2V
K9
A3
1.8V
1.2V
L11
A4
DIMM_DM8
1.2V
L16
A5
DIMM_DQ70
1.2V
L17
A6
ADC_B_OVR
1.2V
L18
A7
DIMM_DQ38
1.2V
L9
A8
ADC_A_D3
1.2V
M10
A9
ADC_A_D4
1.2V
M11
AA1
DAC_A_D1