Altera Cyclone II DSP Development Board - Manual (Page 45)

Altera Corporation Reference Manual 2–37
August 2006 Cyclone II DSP Development Board
Cyclone II DSP Development Board Components
SSRAM Sleep & Run Modes (J24)
J24 selects SLEEP mode or RUN mode for the SSRAM. A jumper on pins
1 and 2 selects SLEEP mode, a jumper on pins 2 and 3 selects RUN mode,
as shown in
Figure 2–13 and Figure 2–14 .
Figure 2–13. SSRAM SLEEP & RUN Modes (J24)
Figure 2–14. Example of SSRAM in Sleep Mode
EPCS Select (J29)
J29 selects the SAFE or USER EPCS configuration mode. See “EPCS64
Flash Memory Devices (U17, U36)” on page 38 for details on how to
configure SAFE and USER EPCS configuration modes.
J24
J24
1
3
SLEEP
RUN
SLEEP Mode