Altera Cyclone II DSP Development Board - Manual (Page 46)

2–38 Reference Manual Altera Corporation
Cyclone II DSP Development Board August 2006
Memory Components
EPCS64 Flash Memory Devices (U17, U36)
The Cyclone II DSP development board contains two EPCS64 flash
memory serial configuration devices (U17, U36) to configure the EP2C70
FPGA using the active serial (AS) configuration scheme.
Use the Quartus II software to program the EPCS64 devices (U17 and
U36) via the ASI connector (J13).
■ The EPCS64 device labeled U17 (SAFE EPCS) stores the factory
design. U17 is preprogrammed with the factory design; you can
reprogram U17 using the ASI interface. The EPCS64 device
configures the EP2C70 FPGA when J29 has a jumper on pins 1 and 2
and U17 contains valid data.
■ The EPCS64 device labeled U36 (USER EPCS) is provided to store a
user design. This device configures the EP2C70 FPGA when J29 has
a jumper on pins 2 and 3 and U36 contains valid data.
1
If there is no jumper on J29, the EPCS64 serial configuration
devices will not program the EP2C70 FPGA.
w The factory design in U17 may be overwritten. If this happens,
you can restore it as described in
“Restoring the Factory Design”
on page D–1 .
f
For additional information about the EP2C70 FPGA, configuring
Cyclone II devices, the AS configuration scheme, and the ASMI, see the
following documents:
● Serial Configuration Devices (EPCS1, EPCS4, EPCS16, & EPCS64)
Features chapter in the Configuration Handbook, volume 2
● Active Serial Interface Data Sheet
● Configuring Altera FPGAs chapter in the Configuration Handbook,
volume 1
● Configuring Cyclone II Devices chapter in the Configuration
Handbook, volume 1
● Configuration & Testing chapter in the Cyclone II Device Handbook,
volume 2
● Configuring Cyclone II Devices chapter of the Cyclone II Device
Handbook, volume 6