Altera Cyclone II DSP Development Board User Manual
Page 88
C–2
Reference Manual
Altera Corporation
Cyclone II DSP Development Board
August 2006
Introduction
1.2V
M16
AA10
DIMM_DQ25
1.2V
M17
AA11
DIMM_DQ29
1.2V
N10
AA12
DIMM_DM1
1.2V
N17
AA13
DIMM_DQ14
1.2V
P10
AA14
VREF
1.2V
P17
AA15
DIMM_DQ9
1.2V
R10
AA16
DIMM_DQ0
1.2V
R11
AA17
DIMM_WEN_R
1.2V
R16
AA18
DIMM_SCL
1.2V
R19
AA19
VCCA_PLL4
1.2V
R8
AA2
AUDIO_MODE
1.2V
T11
AA20
DIMM_CK_N2
1.2V
T16
AA21
GND
1.2V
T18
AA22
3.3V
1.2V
T19
AA23
EVM_OEN
1.2V
T8
AA24
EVM_D9
1.2V
T9
AA25
EVM_D5
1.2V
U11
AA26
EVM_D7
1.2V
U13
AA3
DIG_LSB_C
1.2V
U14
AA4
VGA_G5
1.2V
U15
AA5
DAC_A_D7
1.2V
U16
AA6
USER_LED6
1.2V
U18
AA7
USER_LED7
1.2V
U9
AA8
VCCA_PLL1
1.2V
V10
AA9
DIMM_DQ31
1.2V
V16
AB1
DAC_A_D0
1.2V
V18
AB10
DIMM_DQ24
1.2V
V9
AB11
GND
1.2V
W10
AB12
DIMM_DQ20
1.2V
W11
AB13
1.8V
1.2V
W15
AB14
1.8V
1.2V
W16
AB15
DIMM_BA_R2
Table C–1. Cyclone II EP2C70F672-C6ES FPGA Pin-Outs (Part 2 of 22)
Note (1)
Alphabetical by Signal Name
Alphabetical by Pin Number
Schematic Signal Name
Pin Number
Pin Number
Schematic Signal Name