Table 59. pin configuration register design woksh – Intel 386 User Manual
Page 107
Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
5-34
Table 5-9. Pin Configuration Register Design Woksheet
Bit #
P1CFG
Value
Bit #
P2CFG
Value
Bit #
P3CFG
Value
7
0 = P1.7
7
0 = P2.7
7
0 = P3.7
1 = HLDA
1 = CTS0#
1 = COMCLK
6
0 = P1.6
6
0 = P2.6
6
0 = P3.6
1 = HOLD
1 = TXD0
1 = PWRDOWN
5
0 = P1.5
5
0 = P2.5
5
0 = P3.5
1 = LOCK#
1 = RXD0
1 = INT3
4
0 = P1.4
4
0 = P2.4
4
0 = P3.4
1 = RIO#
1 = CS4#
1 = INT2
3
0 = P1.3
3
0 = P2.3
3
0 = P3.3
1 = DSR0#
1 = CS3#
1 = INT1
2
0 = P1.2
2
0 = P2.2
2
0 = P3.2
1 = DTR0#
1 = CS2#
1 = INT0
1
0 = P1.1
1
0 = P2.1
1
0 = P3.1
1 = RTS0#
1 = CS1#
1 = mux
0
0 = P1.0
0
0 = P2.0
0
0 = P3.0
1 = DCD0#
1 = CS0#
1 = mux
Bit #
PINCFG
Value
Pins w/o Muxes
X
Pins w/o Muxes
X
7
Reserved
DRQ0
TMRCLK0
6
0 = CS6#
DCD1#
INT4
1 = REFRESH#
DRQ1
TMRGATE0
5
0 = Coprocessor Sigs.
1
RXD1
INT5
1 = TMR2 Signals
2
DSR1#
TMRCLK1
4
0 = DACK0#
STXCLK
INT6
1 = CS5#
RI1#
TMRGATE1
3
0 = EOP#
SSIORX
INT7
1 = CTS1#
2
0 = DACK1#
1 = TXD1
NOTES:
1
0 = SRXCLK
1
PEREQ, BUSY#, ERROR#
1 = DTR1#
2
TMROUT2, TMRCLK2, TMRGATE2
0
0 = SSIOTX
1 = RTS1#