Intel 386 - Manual (Page 305)

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
11-18
Use P1CFG bits 4:0 to connect SIO0 signals to package pins.
Figure 11-8. Port 1 Configuration Register (P1CFG)
Port 1 Configuration
P1CFG
(read/write) Expanded Addr:
ISA Addr:
Reset State: F820H
—
00H
7 0
PM7 PM6 PM5 PM4 PM3 PM2 PM1 PM0
Bit
Number
Bit
Mnemonic
Function
7 PM7 Pin Mode:
0 = Selects P1.7 at the package pin.
1 = Selects HLDA at the package pin.
6 PM6 Pin Mode:
0 = Selects P1.6 at the package pin.
1 = Selects HOLD at the package pin.
5 PM5 Pin Mode:
0 = Selects P1.5 at the package pin.
1 = Selects LOCK# at the package pin.
4 PM4 Pin Mode:
0 = Selects P1.4 at the package pin.
1 = Selects RI0# at the package pin.
3 PM3 Pin Mode:
0 = Selects P1.3 at the package pin.
1 = Selects DSR0# at the package pin.
2 PM2 Pin Mode:
0 = Selects P1.2 at the package pin.
1 = Selects DTR0# at the package pin.
1 PM1 Pin Mode:
0 = Selects P1.1 at the package pin.
1 = Selects RTS0# at the package pin.
0 PM0 Pin Mode:
0 = Selects P1.0 at the package pin.
1 = Selects DCD0# at the package pin.