Chapter 5 device configuration, 1 introduction – Intel 386 User Manual

Page 74

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5-1

CHAPTER 5

DEVICE CONFIGURATION

The Intel386™ EX processor provides many possible signal to pin connections as well as periph-
eral to peripheral connections. This chapter describes the available configurations and how to
configure them.

This chapter is organized as follows:

•

Introduction (see below)

•

Peripheral Configuration (page 5-3)

•

Pin Configuration (page 5-23)

•

Device Configuration Procedure (page 5-28)

•

Configuration Example (page 5-28)

5.1

INTRODUCTION

Device configuration is the process of setting up the microprocessor’s on-chip peripherals

†

for a

particular system design. Specifically, device configuration consists of programming registers to
connect peripheral signals to the package pins and interconnect the peripherals. The peripherals
include the following:

•

DMA Controller (DMA)

•

Interrupt Control Unit (ICU)

•

Timer/counter Unit (TCU)

•

Asynchronous Serial I/O Units (SIO0, SIO1)

•

Synchronous Serial I/O Unit (SSIO)

•

Refresh Control Unit (RCU)

•

Chip-select Unit (CSU)

•

Watchdog Timer Unit (WDT)

In addition, the pin configuration registers control connections from the coprocessor to the core
and pin connections to the bus arbiter.

†

In this chapter, the terms “peripheral” and “on-chip peripheral” are used interchangeably. An “off-chip peripheral” is
external to the Intel386 EX processor.

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